Once a year, TSMC holds an annual conference showing what it has achieved during the past year. This year’s TSMC technology symposium was no different, with the semiconductor manufacturer sharing the developments of all process nodes it’s currently working on, including the N6RF, N5A, N4, and N3 nodes.
TSMC’s 4nm chips will be based on the N5 design rules but still offer more performance, power efficiency, and transistor density than its predecessor. Risk production is set for the third quarter of 2021, TSMC said.
Moving the 4nm trial production date should not affect the 3nm process node. According to TSMC, this node will be based on the FinFET transistor architecture and offer up to a 15% speed gain or consume up to 30% less power than the N5 node. In any case, it will provide up to 70% more logic density.
During the technology symposium, TSMC also introduced the N5A process node aimed at automotive applications. Performance and efficiency-wise, it will offer the same capabilities as the N5 node with the addition of meeting the AEC-Q100 Grade 2 standard requirements.
Moreover, TSMC talked about the N6RF, a node based on the 6nm manufacturing process specifically designed for 5G RF and WiFi 6/6E solutions. The prior generation of the RF process node was based on the 16nm node, so expect to see massive improvements over it when using semiconductors based on TSMC’s latest node for RF technology.
Lastly, TSMC announced it’s expanding its 3D stacking and packaging technologies. Later this year, computing applications can benefit from larger floor plans when using InFO_oS and CoWoS packages. As for mobile applications, the company introduced the InFO_B solution, which allows customers to stack DRAM in a compact package.
Considering all the fronts TSMC has been working on and the planned infrastructure expansion, the company’s growth shouldn’t be slowing down soon.